前言:
现时兄弟们对“c语言时钟程序编写”都比较注意,我们都需要了解一些“c语言时钟程序编写”的相关知识。那么小编也在网上网罗了一些关于“c语言时钟程序编写””的相关内容,希望姐妹们能喜欢,咱们一起来了解一下吧!void system_clock_init(void){ int count = 1000; (*(volatile unsigned int *)S3C6410_OTHERS_ADDR) |= (1 << 6); //sys clock select in cmu while(count--); //nop (*(volatile unsigned int *)S3C6410_OTHERS_ADDR) |= ((1 << 7) | (1 << 6)); //syncmodereq to arm,0:asynchronous mode 1:synchronous mode while((((*(volatile unsigned int *)S3C6410_OTHERS_ADDR) & 0xF00) != 0xF00)); //synchronous acknowledge writel(0xffff, S3C6410_APLL_LOCK); //control pll locking period for apll writel(0xffff, S3C6410_MPLL_LOCK); //control pll locking period for mpll writel(0xffff, S3C6410_EPLL_LOCK); //control pll locking period for epll (*(volatile unsigned int *)S3C6410_CLOCK_DIV2) &= 0xFFF0FFFF; (*(volatile unsigned int *)S3C6410_CLOCK_DIV2) |= (0x3 << 16); //uart clock divider ratio,clkuart=clkuart_in/(uart_ratio+1) //0:3 div_arm clock divider ratio //4 div_mpll clock divider ratio //8 hclk clock divider ratio //9:11 hclkx2 clock divider ratio //12:15 pclk clock divider ratio,which must be odd value. in other words,s3c6410 supports only even divider ratio (*(volatile unsigned int *)S3C6410_CLOCK_DIV0) &= 0xFFFC0000; (*(volatile unsigned int *)S3C6410_CLOCK_DIV0) |= ((0x3 << 12) | (1 << 9) | (1 << 8) | (1 << 4) | 0); //0:2 sdiv,pll s divide value //8:13 pdiv,pll p divide value //16:25 pdiv,pll m divide value //31: pll enable control,0:disable 1:enable //f_out=mdiv*f_in(12MHZ)/(pdiv * (1 << sdiv)) writel(((1 << 31) | (266 << 16) | (3 << 8) | (1 << 0)), S3C6410_APLL_CON); writel(((1 << 31) | (266 << 16) | (3 << 8) | (1 << 0)), S3C6410_MPLL_CON); //0:2 sdiv, pll s divide value 0x3 //8:13 pdiv, pll p divide value 0x2 //16:23 mdiv, pll m divide value 0x20 //31: pll enable control,0:disable 1:enable writel(0x80200203, S3C6410_EPLL_CON0); //0:15 kdiv,pll k divide value //f_out=(mdiv+kdiv/2^16)*f_in/(pdiv*2^sdiv) 24MHZ writel(0, S3C6410_EPLL_CON1); //0 control mux_apll,0:fin_apll 1:fout_apll //1 control mux_mpll,0:fin_mpll 1:fout_mpll //2 control mux_epll,0:fin_epll 1:fout_epll //13 control uart0,which is the source clock of uart,0:mout_epll 1:dout_mpll (*(volatile unsigned int *)(S3C6410_CLOCK_SRC)) |= (0x2007); count = 0x10000; while(count--); //nop //(*(volatile unsigned int *)S3C6410_OTHERS_ADDR) &= 0xFFFFFFDF; }
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